HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 459

• Manufacturer Part Number: HD6413008F
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
• Manufacturer: RENESAS [Renesas Technology Corp]

14.2
14.2.1
The four A/D data registers (ADDRA to ADDRD) are 16-bit read-only registers that store the
results of A/D conversion.
An A/D conversion produces 10-bit data, which is transferred for storage into the A/D data
register corresponding to the selected channel. The upper 8 bits of the result are stored in the upper
byte of the A/D data register. The lower 2 bits are stored in the lower byte. Bits 5 to 0 of an A/D
data register are reserved bits that are always read as 0. Table 14.3 indicates the pairings of analog
input channels and A/D data registers.
The CPU can always read the A/D data registers. The upper byte can be read directly, but the
lower byte is read through a temporary register (TEMP). For details see section 14.3, CPU
Interface.
The A/D data registers are initialized to H'0000 by a reset and in standby mode.
Table 14.3 Analog Input Channels and A/D Data Registers (ADDRA to ADDRD)
Group 0
AN
AN
AN
AN
Bit
ADDRn
Initial value
Read/Write
Note: n = A to D
0
1
2
3
Analog Input Channel
Register Descriptions
A/D Data Registers A to D (ADDRA to ADDRD)
AD9
15
Group 1
AN
AN
AN
AN
R
0
4
5
6
7
AD8
14
R
0
AD7
13
R
0
A/D conversion data
10-bit data giving an
A/D conversion result
AD6
12
R
0
A/D Data Register
ADDRA
ADDRB
ADDRC
ADDRD
AD5
11
R
0
AD4
10
R
0
AD3
R
9
0
AD2
R
8
0
Rev.4.00 Aug. 20, 2007 Page 415 of 638
AD1
R
7
0
AD0
R
6
0
⎯
R
5
0
⎯
R
4
0
Reserved bits
⎯
R
3
0
14. A/D Converter
REJ09B0395-0400
⎯
R
2
0
⎯
R
1
0
⎯
R
0
0