HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 233

• Manufacturer Part Number: HD6413008F
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
• Manufacturer: RENESAS [Renesas Technology Corp]

When bit PWM1 is set to 1 to select PWM mode, pin TIOCA
output goes to 1 at compare match with GRA1, and to 0 at compare match with GRB1.
Bit 0—PWM Mode 0 (PWM0): Selects whether channel 0 operates normally or in PWM mode.
Bit 0
PWM0
0
1
When bit PWM0 is set to 1 to select PWM mode, pin TIOCA
output goes to 1 at compare match with GRA0, and to 0 at compare match with GRB0.
8.2.4
TISRA is an 8-bit readable/writable register that indicates GRA compare match or input capture
and enables or disables GRA compare match and input capture interrupt requests.
TISRA is initialized to H'88 by a reset and in standby mode.
Bit 7—Reserved: This bit cannot be modified and is always read as 1.
Initial value
Read/Write
Note: * Only 0 can be written, to clear the flag.
Timer Interrupt Status Register A (TISRA)
Description
Channel 0 operates normally
Channel 0 operates in PWM mode
Bit
Reserved bit
⎯
⎯
7
1
IMIEA2
R/W
6
0
Input capture/compare match interrupt enable A2 to A0
These bits enable or disable interrupts by the IMFA flags
IMIEA1
R/W
5
0
IMIEA0
R/W
4
0
Reserved bit
⎯
⎯
3
1
Rev.4.00 Aug. 20, 2007 Page 189 of 638
1
0
becomes a PWM output pin. The
becomes a PWM output pin. The
R/(W)*
IMFA2
Input capture/compare match
flags A2 to A0
Status flags indicating GRA
compare match or input capture
2
0
R/(W)*
IMFA1
1
0
REJ09B0395-0400
R/(W)*
IMFA0
8. 16-Bit Timer
0
0
(Initial value)