HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 109

• Manufacturer Part Number: HD6413008F
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
• Manufacturer: RENESAS [Renesas Technology Corp]

4.1
4.1.1
As table 4.1 indicates, exception handling may be caused by a reset, interrupt, or trap instruction.
Exception handling is prioritized as shown in table 4.1. If two or more exceptions occur
simultaneously, they are accepted and processed in priority order. Trap instruction exceptions are
accepted at all times in the program execution state.
Table 4.1
Priority Exception Type
High
Low
4.1.2
Exceptions originate from various sources. Trap instructions and interrupts are handled as follows.
1. The program counter (PC) and condition code register (CCR) are pushed onto the stack.
2. The CCR interrupt mask bit is set to 1.
3. A vector address corresponding to the exception source is generated, and program execution
Note: For a reset exception, steps 2 and 3 above are carried out.
starts from that address.
Reset
Interrupt
Trap instruction (TRAPA) Started by execution of a trap instruction (TRAPA)
Overview
Exception Handling Types and Priority
Exception Handling Operation
Exception Types and Priority
Section 4 Exception Handling
Start of Exception Handling
Starts immediately after a low-to-high transition at the RES pin
Interrupt requests are handled when execution of the current
instruction or handling of the current exception is completed
Rev.4.00 Aug. 20, 2007 Page 65 of 638
4. Exception Handling
REJ09B0395-0400