HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 363

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HD6413008F

Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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11.3.4
The WRST bit in RSTCSR is valid when bits WT/IT and TME are both set to 1 in TCSR.
Figure 11.7 shows the timing of setting of WRST and the internal reset timing. The WRST bit is
set to 1 when TCNT overflows and OVF is set to 1. At the same time an internal reset signal is
generated for the entire H8/3008 chip. This internal reset signal clears OVF to 0, but the WRST bit
remains set to 1. The reset routine must therefore clear the WRST bit.
φ
TCNT
Overflow signal
OVF
WDT internal
reset
WRST
Timing of Setting of Watchdog Timer Reset Bit (WRST)
Figure 11.7 Timing of Setting of WRST Bit and Internal Reset
H'FF
H'00
Rev.4.00 Aug. 20, 2007 Page 319 of 638
11. Watchdog Timer
REJ09B0395-0400

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