h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 381

• Manufacturer Part Number: h8s-2172
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
• Manufacturer: Renesas Electronics Corporation.

12.5.4
EP1 has two 64-byte FIFOs in full-speed mode and two 512-byte FIFOs in high-speed mode, but
the user can receive data and read receive data without being aware of this dual-FIFO
configuration. Make sure to confirm that the EP1 FULL bit in IFR0 is set to 1 before reading the
single FIFO.
When one FIFO is full after reception is completed, the EP1 FULL bit in IFR0 is set. After the
first receive operation into one of the FIFOs when both FIFOs are empty, the other FIFO is empty,
and so the next packet can be received immediately. When both FIFOs are full, NAK is returned
to the host automatically. When reading of the receive data is completed following data reception,
this operation empties the FIFO that has just been read, and makes it ready to receive the next
packet. If 0-length packet is received from the host, the ACK handshake is returned to the host
regardless of mode (full-speed or high-speed mode) and the EP1 FULL bit in IFR0 is not set.
Note: The dual-configured FIFOs are handled in packet units. Therefore, even if either of FIFOs
is empty because of a short packet, when the packet is received successfully, both FIFOs
become full.
EP1 Bulk-Out Transfer (Dual FIFO)
Rev. 2.00, 03/04, page 349 of 534