h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 154

• Manufacturer Part Number: h8s-2172
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
• Manufacturer: Renesas Electronics Corporation.

6.6
In this LSI, external space area 2 can be designated as DRAM space, and DRAM interfacing
performed. The DRAM interface allows DRAM to be directly connected to this LSI. A DRAM
space of 10 Mbytes can be set by means of bit DSET in DRAMCR. Burst operation is also
possible, using fast page mode.
6.6.1
Area 2 is designated as DRAM space by setting bit DSET in DRAMCR to 1.
In DRAM space, the RAS signal is valid. The bus specifications for DRAM space such as the bus
width, number of wait states, and so on are determined according to the settings for area 2.
6.6.2
With DRAM space, the row address and column address are multiplexed. In address multiplexing,
the size of the shift of the row address is selected with bits MXC2 to MXC0 in DRAMCR. Table
6.5 shows the relation between the settings of bits MXC2 to MXC0 and the shift size.
Table 6.5
Rev. 2.00, 03/04, page 122 of 534
Row
address
Column
address
MXC2 MXC1 MXC0 Shift Size
0
1

DRAM Interface
Setting DRAM Space
Address Multiplexing
DRAMCR
0
1


Relation between Settings of Bits MXC2 to MXC0 and Address Multiplexing
0
1
0
1


8 bits
9 bits
10 bits
11 bits
Reserved
(setting
prohibited)

A19 to
A16
A19 to
A16
A19 to
A16
A19 to
A16
A19 to
A16

A19 to
A16
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8
A15 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9
A15 A14 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A15 A14 A13 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0




Address Pins

         