h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 316

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h8s-2172

Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
10.2
The WDT has the following registers. To prevent accidental overwriting, TCSR and TCNT have
to be written to in a method different from normal registers. For details, see section 10.5.1, Notes
on Register Access.
• Timer counter (TCNT)
• Timer control/status register (TCSR)
10.2.1
TCNT is an 8-bit readable/writable up-counter. TCNT is initialized to H'00 when the TME bit in
timer control/status register (TCSR) is cleared to 0.
10.2.2
TCSR selects the clock source to be input to TCNT, and the timer mode.
Rev. 2.00, 03/04, page 284 of 534
Bit
7
6
Bit Name
OVF
WT/IT
Register Descriptions
Timer Counter (TCNT)
Timer Control/Status Register (TCSR)
Initial
Value
0
0
R/W
R/(W)*
R/W
1
Description
Timer Mode Select
Overflow Flag
Indicates that TCNT has overflowed (changes from H'FF
to H'00).
[Setting condition]
When TCNT overflows (changes from H'FF to H'00)
When internal reset request generation is selected in
watchdog timer mode, OVF is cleared automatically by
the internal reset.
[Clearing conditions]
Selects whether the WDT is used as a watchdog timer or
interval timer.
0: Interval timer mode
1: Watchdog timer mode
When TCSR is read when OVF = 1*
written to OVF
When 0 is written to TME
2
, then 0 is

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