h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 559

• Manufacturer Part Number: h8s-2172
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
• Manufacturer: Renesas Electronics Corporation.

Item
Section 4 Exception
Handling
4.3.1 Reset Exception
Handling
Figure 4.1 Reset
Sequence
Section 10 Watchdog
Timer (WDT)
10.2.2 Timer Control/
Status Register (TCSR)
Section 12 Universal
Serial Bus 2 (USB2)
12.1 Features
12.3.16 FIFO Clear
Register 0 (FCLR0)
12.3.18 DMA Set Register
0 (DMA0)
12.5.1 USB Cable
Connection
Figure 12.2 USB Cable
Connection
Main Revisions and Additions in this Edition
Page
58
285
319
334
336
341
Revisions (See Manual for Details)
Description added
(1), (3) Reset exception handling vector address
((1) = H'000000, (3) = H'000002)
Bits2 to 0 amended
101: φ/8192 (frequency: 63.5 ms)
Description added
•
•
Description added
EP2 having a dual-FIFO configuration is cleared by entire
FIFOs. Similarly, as for EP1 FIFO with a dual-FIFO
configuration, the only side currently selected is cleared.
Description added
That is, when there is no valid data in the FIFO even with one
side, the transfer is requested to the DMAC.
Description added
Supports the USB version 2.0
Supports four endpoints; EP0, EP1, EP2, and EP3
Receive bus reset
BRST in IFR0 = 1
D+ pull-up on
Rev. 2.00, 03/04, page 527 of 534