h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 171
h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 171 of 570
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Self-Refreshing: A self-refresh mode (battery backup mode) is provided for DRAM as a kind of
standby mode. In this mode, refresh timing and refresh addresses are generated within the DRAM.
To select self-refreshing, set the RFSHE bit and SLFRF bit to 1 in REFCR. When a SLEEP
instruction is executed to enter software standby mode, the CAS and RAS signals are output and
DRAM enters self-refresh mode, as shown in figure 6.40.
If a CBR refresh request occurs when making a transition to software standby mode, CBR
refreshing is executed, then self-refresh mode is entered.
In some DRAMs provided with a self-refresh mode, the RAS signal precharge time immediately
after self-refreshing is longer than the normal precharge time. A setting can be made in bits
TPCS2 to TPCS0 in REFCR to make the precharge time immediately after self-refreshing from 1
to 7 states longer than the normal precharge time. In this case, too, normal precharging is
performed according to the setting of bits TPC1 and TPC0 in DRACCR, and therefore a setting
should be made to give the optimum post-self-refresh precharge time, including this time. Figure
6.41 shows an example of the timing when the precharge time immediately after self-refreshing is
extended by 2 states.
φ
(
(
,
)
)
T
Rp
Figure 6.40 Self-Refresh Timing
T
Rr
High
Software
standby
Rev. 2.00, 03/04, page 139 of 534
T
Rc3
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