h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 125

• Manufacturer Part Number: h8s-2172
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
• Manufacturer: Renesas Electronics Corporation.

6.3.5
RDNCR selects the read strobe signal (RD) negation timing in a read access to normal space.
Bit
7
6
5
4
3 to 0
RDNn = 0
RDNn = 1
Legend
n = 3 to 0
Figure 6.3 Read Strobe Negation Timing (Example of 3-State Access Space)
Bit Name
RDN3
RDN2
RDN1
RDN0

Read Strobe Timing Control Register (RDNCR)
Data
Data
Initial
Value
0
0
0
0
All 0
R/W
R/W
R/W
R/W
R/W
R/W
T
1
Description
Reserved
Read Strobe Timing Control 3 to 0
These bits set the negation timing of the read strobe in
a corresponding area read access.
As shown in figure 6.3, the read strobe for an area for
which the RDNn bit is set to 1 is negated one half-state
earlier than that for an area for which the RDNn bit is
cleared to 0. The read data setup and hold time
specifications are also one half-state earlier.
0: In an area n read access, the RD is negated at the
1: In an area n read access, the RD is negated one
These bits can be read from or written to. However, the
write value should always be 0.
end of the read cycle
half-state before the end of the read cycle
Bus cycle
T
2
Rev. 2.00, 03/04, page 93 of 534
T
3
(n = 3 to 0)