h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 100
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 100 of 570
- Download datasheet (5Mb)
5.3.5
IER controls the enabling and disabling of interrupt requests IRQ7 to IRQ0.
5.3.6
ISR is a flag register that indicates the status of IRQ7 to IRQ0 interrupt requests.
Rev. 2.00, 03/04, page 68 of 534
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
IRQ Enable Register (IER)
IRQ Status Register (ISR)
Bit Name
IRQ7E
IRQ6E
IRQ5E
IRQ4E
IRQ3E
IRQ2E
IRQ1E
IRQ0E
Bit Name
IRQ7F
IRQ6F
IRQ5F
IRQ4F
IRQ3F
IRQ2F
IRQ1F
IRQ0F
Initial
Value
0
0
0
0
0
0
0
0
Initial
Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
IRQn Enable (n = 7 to 0)
The IRQn interrupt request is enabled when this bit is 1.
Description
[Setting condition]
When the interrupt source selected by the ISCR
registers occurs
[Clearing conditions]
•
•
•
(n = 7 to 0)
When reading IRQnF flag when IRQnF = 1, then
writing 0 to IRQnF flag
When interrupt exception handling is executed when
low-level detection is set and IRQn input is high
When IRQn interrupt exception handling is executed
when falling-edge, rising-edge, or both-edge
detection is set
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