h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 378

no-image

h8s-2172

Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
3. Data Stage (Control-Out)
Rev. 2.00, 03/04, page 346 of 534
The firmware first analyzes the request data that is sent from the host in the setup stage, and
determines the subsequent data stage direction. If the result of request data analysis is that the
data stage is out-transfer, data from the host is waited for, and after data is received (EP0o TS
bit in IFR0 is set to 1), data is read from the FIFO.
The end of the data stage is identified when the host transmits an IN token and the status stage
is entered.
Receive PING token (high speed)
Receive OUT token (full speed)
(EP0o TS in IFR0 = 1)
Receive data from host
Set EP0o receive
Receive PING token
Is all received data
Receive OUT token
complete flag
in FIFO read?
to SETUP TS
USB function
0 written
in IFR0?
Figure 12.7 Data Stage Operation (Control-Out)
Yes
Yes
NYET (high speed)
ACK (full speed and
0-length packet)
ACK (for only PING)
ACK (for only PING)
High speed
Full speed
No
No
NAK
NAK
Interrupt generated
Confirm receive data length from
EP0o receive data size register
Read data from EP0o data
(EP0oTS in IFR0 = 0)
Clear interrupt flag
register (EPDR0o)
Firmware
(EPSZ0o)

Related parts for h8s-2172