h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 443

no-image

h8s-2172

Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
12. Programming
13. The return value in the programming program, FPFR (general register R0L) is determined.
14. Determine whether programming of the necessary data has finished.
15. After programming finishes, clear FKEY and specify software protection.
 Example of the FMPDR setting
There is an entry point of the programming program in the area from the start address specified
by FTDAR + 16 bytes of the on-chip RAM. The subroutine is called and programming is
executed by using the following steps.
MOV.L
JSR
NOP
 The general registers other than R0L are held in the programming program.
 R0L is a return value of the FPFR parameter.
 Since the stack area is used in the programming program, a stack area of 128 bytes at the
If more than 128 bytes of data are to be programmed, specify FMPAR and FMPDR in 128-
byte units, and repeat steps 12 to 14. Increment the programming destination address by 128
bytes and update the programming data pointer correctly. If an address which has already been
programmed is written to again, not only will a programming error occur, but also flash
memory will be damaged.
If this LSI is restarted by a reset immediately after user MAT programming has finished,
secure the reset period (period of RES = 0) of 100 µs which is longer than normal.
When the storage destination of the program data is flash memory, even if the program
execution routine is executed, programming is not executed and an error is returned to the
FPFR parameter. In this case, the program data must be transferred to the on-chip RAM
and then programming must be executed.
maximum must be allocated in RAM.
#DLTOP+16,ER2
@ER2
; Set entry address to ER2
; Call programming routine
Rev. 2.00, 03/04, page 411 of 534

Related parts for h8s-2172