h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 361

• Manufacturer Part Number: h8s-2172
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
• Manufacturer: Renesas Electronics Corporation.

12.3.3
IER0 enables the interrupt request indicated in the interrupt flag register. When an interrupt flag is
set while the corresponding bit in IER0 is set to 1, an interrupt request selected by the interrupt
select register is asserted.
12.3.4
EPSZ0o is a receive data size register for endpoint 0o. EPSZ0o indicates the number of bytes of
data to be received from the host.
Bit
31 to 25
24
23 to 17
16
15 to 10
9
8
7
6
5
4
3
2
1
0
Bit
31 to 0
EP0o Receive Data Size Register (EPSZ0o)
Interrupt Enable Register 0 (IER0)
Bit Name



EP3TR
EP3TS
BRST
EP2TR
EP2EMPTY 0
EP1FULL
SETUPTS
EP0oTS
EP0iTR
EP0iTS
Bit Name
D31 to D0
MODE F
VBUS F
Initial
Value
All 0
0
All 0
0
All 0
0
0
0
0
0
0
0
0
0
Initial
Value
—
R/W
R
R/W
R
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Description
Reserved
The write value should always be 0.
Enables the MODE F interrupt.
Reserved
The write value should always be 0.
Enables the VBUS F interrupt.
Reserved
The write value should always be 0.
Enables the EP3TR interrupt.
Enables the EP3TS interrupt.
Enables the BRST interrupt.
Enables the EP2TR interrupt.
Enables the EP2EMPTY interrupt.
Enables the EP1FULL interrupt
Enables the SETUPTS interrupt.
Enables the EP0oTS interrupt.
Enables the EP0iTR interrupt.
Enables the EP0iTS interrupt.
Description
EP0o Receive Data Size
Rev. 2.00, 03/04, page 329 of 534