r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 84

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r4f2456

Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 2 CPU
2.4.5
This 64-bit register stores the results of multiply-and-accumulate operations. It consists of two 32-
bit registers denoted MACH and MACL. The lower 10 bits of MACH are valid; the upper bits are
a sign extension.
2.4.6
When the reset exception handling loads the start address from the vector address, PC is
initialized, the T bit in EXR is cleared to 0, and the I bits in EXR and CCR are set to 1. However,
the general registers and the other CCR bits are not initialized. The initial value of SP (ER7) is
undefined. SP should therefore be initialized by using the MOV.L instruction immediately after a
reset.
Rev. 1.00 Sep. 19, 2008 Page 54 of 1342
REJ09B0467-0100
Bit
2
1
0
Multiply-Accumulate Register (MAC)
Initial Values of CPU Internal Registers
Bit Name
Z
V
C
Undefined
Undefined
Undefined
Initial Value
R/W
R/W
R/W
R/W
Description
Zero Flag
Set to 1 to indicate zero data, and cleared to 0 to
indicate non-zero data.
Overflow Flag
Set to 1 when an arithmetic overflow occurs, and
cleared to 0 otherwise.
Carry Flag
Set to 1 when a carry occurs, and cleared to 0
otherwise. Used by:
The carry flag is also used as a bit accumulator
by bit manipulation instructions.
Add instructions, to indicate a carry
Subtract instructions, to indicate a borrow
Shift and rotate instructions, to indicate a
carry

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