r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 82

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r4f2456

Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 2 CPU
2.4.2
This 24-bit counter indicates the address of the next instruction the CPU will execute. The length
of all CPU instructions is 2 bytes (one word), so the least significant PC bit is ignored. (When an
instruction is fetched, the least significant PC bit is regarded as 0.)
2.4.3
EXR is an 8-bit register that can be manipulated by the LDC, STC, ANDC, ORC, and XORC
instructions. When these instructions except for the STC instruction is executed, all interrupts
including NMI will be masked for three states after execution is completed.
Rev. 1.00 Sep. 19, 2008 Page 52 of 1342
REJ09B0467-0100
Bit
7
6 to 3
2
1
0
Program Counter (PC)
Extended Register (EXR)
Bit Name
T
I2
I1
I0
SP (ER7)
0
All 1
1
1
1
Initial Value
Figure 2.8 Stack
R/W
R/W
R/W
R/W
R/W
Description
Trace Bit
When this bit is set to 1, a trace exception is
started each time an instruction is executed.
When this bit is cleared to 0, instructions are
executed in sequence.
Reserved
These bits are always read as 1.
These bits designate the interrupt mask level (0
to 7). For details, see section 5, Interrupt
Controller.
Stack area
Free area

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