r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 204

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 6 Bus Controller (BSC)
Rev. 1.00 Sep. 19, 2008 Page 174 of 1342
REJ09B0467-0100
Bit
2
1
0
Bit Name
MXC2
MXC1
MXC0
Initial Value
0
0
0
R/W
R/W
R/W
R/W
Description
Address Multiplex Select
These bits select the size of the shift toward the
lower half of the row address in row
address/column address multiplexing. In burst
operation on the DRAM/synchronous DRAM
interface, these bits also select the row address
bits to be used for comparison.
When the MXC2 bit is set to 1 while continuous
synchronous DRAM space is set, the address
precharge setting command (Precharge-sel) is
output to the upper column address. For details,
refer to sections 6.7.2 and 6.8.2, Address
Multiplexing.
DRAM interface
000: 8-bit shift
•
•
001: 9-bit shift
•
•
010: 10-bit shift
•
•
When 8-bit access space is designated:
Row address bits A23 to A8 used for
comparison
When 16-bit access space is designated:
Row address bits A23 to A9 used for
comparison
When 8-bit access space is designated:
Row address bits A23 to A9 used for
comparison
When 16-bit access space is designated:
Row address bits A23 to A10 used for
comparison
When 8-bit access space is designated:
Row address bits A23 to A10 used for
comparison
When 16-bit access space is designated:
Row address bits A23 to A11 used for
comparison