r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 1213

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r4f2456

Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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25.3
Output of the φ clock can be controlled by means of the PSTOP bit in SCKCR, and DDR for the
corresponding port. When the PSTOP bit is set to 1, the φ clock stops at the end of the bus cycle,
and φ output goes high. φ clock output is enabled when the PSTOP bit is cleared to 0. When DDR
for the corresponding port is cleared to 0, φ clock output is disabled and input port mode is set.
Table 25.4 shows the state of the φ pin in each processing state.
Table 25.4 φ Pin State in Each Processing State
Register Setting
DDR
0
1
1
PSTOP
X
0
1
φ Clock Output Control
Normal
Operating State Sleep Mode
High impedance
φ output
Fixed high
High impedance High impedance
φ output
Fixed high
Software
Standby Mode
Fixed high
Fixed high
Rev. 1.00 Sep. 19, 2008 Page 1183 of 1342
Hardware
Standby Mode
High impedance
High impedance
High impedance
Section 25 Power-Down Modes
REJ09B0467-0100
All Module
Clocks Stop
Mode
High
impedance
φ output
Fixed high

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