r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 425

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r4f2456

Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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EDDAR can be read at all times by the CPU. When reading EDDAR for a channel on which
EXDMA transfer processing is in progress, a longword-size read must be executed. Do not write
to EDDAR for a channel on which EXDMA transfer is in progress. The initial values of EDDAR
are undefined.
8.3.3
EDTCR specifies the number of transfers. The function differs according to the transfer mode. Do
not write to EDTCR for a channel on which EXDMA transfer is in progress.
(1)
Bit
31 to 24
23 to 0
Normal Transfer Mode
EXDMA Transfer Count Register (EDTCR)
Bit Name
Initial Value
All 0
All 0
R/W
R/W
Description
Reserved
These bits are always read as 0 and cannot be
modified.
24-Bit Transfer Counter
These bits specify the number of transfers. Setting
H'000001 specifies one transfer. Setting H'000000
means no specification for the number of
transfers, and the transfer counter function is
halted. In this case, there is no transfer end
interrupt by the transfer counter. Setting
H'FFFFFF specifies the maximum number of
transfers, that is 16,777,215. During EXDMA
transfer, this counter shows the remaining number
of transfers.
This counter can be read at all times. When
reading EDTCR for a channel on which EXDMA
transfer processing is in progress, a longword-size
read must be executed.
Rev. 1.00 Sep. 19, 2008 Page 395 of 1342
Section 8 EXDMA Controller (EXDMAC)
REJ09B0467-0100

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