r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 1151

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 22 Flash Memory
22.5.5
Block Erase
Write H'xx20 in the first bus cycle and H'xxD0 to the highest address (an even address) of the
target block in the second cycle; automatic erasure (erasing data and verifying the erased status)
starts in the specified block.
Completion of automatic erasure can be checked through the FMRDY bit in FLMSTR.
The FMRDY bit is 0 (busy) during automatic erasure and becomes 1 (ready) when erasure is
completed.
After automatic erasure is completed, the result can be checked through the FMERSF bit in
FLMSTR (see section 22.7, Full Status Check).
Figure 22.7 shows a flowchart of the block erase command processing.
In the EW0 mode, the read status register mode is entered as soon as automatic erasure starts, and
the status register can be read. The SR7 bit in the status register becomes 0 when automatic
erasure starts and returns to 1 when erasure is completed. In this case, the flash memory stays in
the read status register mode until a read array command is issued. If an erase error occurs, repeat
a sequence of the clear status register command to block erase command at least three times until
no erase error occurs.
Rev. 1.00 Sep. 19, 2008 Page 1121 of 1342
REJ09B0467-0100