r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 249

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Table 6.6
Legend:
×: Don’t care.
6.7.3
If a bit in ABWCR corresponding to an area designated as DRAM space is set to 1, that area is
designated as 8-bit DRAM space; if the bit is cleared to 0, the area is designated as 16-bit DRAM
space. In 16-bit DRAM space, ×16-bit configuration DRAM can be connected directly.
In 8-bit DRAM space the upper half of the data bus, D15 to D8, is enabled, while in 16-bit DRAM
space both the upper and lower halves of the data bus, D15 to D0, are enabled.
Access sizes and data alignment are the same as for the basic bus interface: see section 6.5.1, Data
Size and Data Alignment.
Row
address
Column
address
MXC2
Data Bus
0
1
0
1
DRAMCR
Relation between Settings of Bits MXC2 to MXC0 and Address Multiplexing
MXC1
0
1
×
×
×
MXC0
0
1
0
1
×
×
×
Shift
Size
10 bits
11 bits
8 bits
9 bits

A23
to
A16 A15 A14 A13 A12 A11 A10 A9
A23
A16
A23
A16
A23
A16
A23
A16
A23
A16
to
to
to
to
to
A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A15 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A15 A14 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A15 A14 A13 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
A15 A14 A13 A12 A11 A10
Reserved (setting prohibited)
Reserved (setting prohibited)
Rev. 1.00 Sep. 19, 2008 Page 219 of 1342
A9
Address Pins
A8
A8
A7
A7
Section 6 Bus Controller (BSC)
A6
A6
A5
A5
A4
A4
REJ09B0467-0100
A3
A3
A2
A2
A1
A9
A1
A0
A8
A9
A0