r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 1113

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r4f2456

Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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[1]
[2]
[3]
[4]
Note: Hatching boxes represent SSU internal operations.
Data transferred from SSTDR to SSTRSR
Set TDRE to 1 to start transmission
Confirm that TEND is cleared to 0
Write transmit data to SSTDR
TDRE automatically cleared
Consecutive data transmission?
Clear TE in SSER to 0
Read TDRE in SSSR
Read TEND in SSSR
quantum elapsed?
End transmission
Figure 20.6 Flowchart Example of Data Transmission (SSU Mode)
Clear TEND to 0
Initial setting
One bit time
TDRE = 1?
TEND = 1?
Yes
Yes
Yes
No
Start
Yes
No
No
No
Section 20 Synchronous Serial Communication Unit (SSU)
[1] Initial setting:
[2] Check that the SSU state and write transmit data:
[3] Procedure for consecutive data transmission:
[4] Procedure for data transmission end:
Specify the transmit data format.
Write transmit data to SSTDR after reading and confirming
that the TDRE bit is 1. The TDRE bit is automatically cleared
to 0 and transmission is started by writing data to SSTDR.
To continue data transmission, confirm that the TDRE bit is 1
meaning that SSTDR is ready to be written to. After that, data
can be written to SSTDR. The TDRE bit is automatically
cleared to 0 by writing data to SSTDR.
To end data transmission, confirm that the TEND bit is cleared
to 0. After completion of transmitting the last bit, clear the TE
bit to 0.
Rev. 1.00 Sep. 19, 2008 Page 1083 of 1342
REJ09B0467-0100

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