r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 455

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r4f2456

Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(1)
If transfer requests for different channels are issued during a transfer operation, the highest-
priority channel (excluding the currently transferring channel) is selected. The selected channel
begins transfer after the currently transferring channel releases the bus. If there is a bus request
from a bus master other than the EXDMAC at this time, a cycle for the other bus master is
initiated. If there is no other bus request, the bus is released for one cycle.
Channel switching does not take place during a burst transfer or a block transfer of a single block.
Figure 8.13 shows a case in which transfer requests for channels 2 and 3 are issued
simultaneously. The example shown in the figure illustrates the handling of external requests in
the cycle steal mode.
Transfer Requests from Multiple Channels (Except Auto Request Cycle Steal Mode)
φ
Address bus
EXDMA control
Channel 2
Channel 3
Figure 8.13 Example of Channel Priority Timing
Idle
Request
Request cleared
held
Channel 2
Selected
Channel 2 transfer
Request cleared
Channel 2
Channel 3
Rev. 1.00 Sep. 19, 2008 Page 425 of 1342
release
Bus
Section 8 EXDMA Controller (EXDMAC)
Channel 3 transfer
Channel 3
REJ09B0467-0100
release
Bus

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