r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 453

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

When transfer is halted by writing 0 to the EDA bit, the EDA bit remains at 1 during the DMA
transfer period. In block transfer mode, since a block-size transfer is carried out without
interruption, the EDA bit remains at 1 from the time 0 is written to it until the end of the current
block-size transfer.
In burst mode, transfer is halted for up to three DMA transfers following the bus cycle in which 0
is written to the EDA bit. The EDA bit remains set to 1 from the time of the 0-write until the end
of the last DMA cycle.
Writes (except to the EDA bit) are prohibited to registers of a channel for which the EDA bit is set
to 1. When changing register settings after a 0-write to the EDA bit, it is necessary to confirm that
the EDA bit has been cleared to 0.
Figure 8.12 shows the procedure for changing register settings in an operating channel.
Changing register settings
Figure 8.12 Procedure for Changing Register Settings in Operating Channel
Change register settings
changes completed
in operating channel
Write 0 to EDA bit
Register setting
Read EDA bit
EDA bit = 0?
Yes
No
[1]
[2]
[3]
[4]
[1] Write 0 to the EDA bit in EDMDR.
[2] Read the EDA bit.
[3] Confirm that EDA = 0. If EDA = 1, this
[4] Write the required set values to the
indicates that DMA transfer is in progress.
registers.
Rev. 1.00 Sep. 19, 2008 Page 423 of 1342
Section 8 EXDMA Controller (EXDMAC)
REJ09B0467-0100