r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 378

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 7 DMA Controller (DMAC)
In repeat mode, ETCRL functions as the transfer counter, and ETCRH is used to hold the number
of transfers. ETCRL is decremented by 1 each time a data transfer is executed, and when its value
reaches H'00, it is loaded with the value in ETCRH. At the same time, the value set in MAR is
restored in accordance with the values of the DTSZ and DTID bits in DMACR. The MAR
restoration operation is as shown below.
DTID
DTSZ
MAR = MAR – (–1)
· 2
· ETCRH
The same value should be set in ETCRH and ETCRL.
In repeat mode, operation continues until the DTE bit in DMABCRL is cleared. To end the
transfer operation, therefore, the DTE bit should be cleared to 0. A transfer end interrupt request is
not sent to the CPU or DTC. By setting the DTE bit to 1 again after it has been cleared, the
operation can be restarted from the transfer after that terminated when the DTE bit was cleared.
Figure 7.7 illustrates operation in repeat mode.
Rev. 1.00 Sep. 19, 2008 Page 348 of 1342
REJ09B0467-0100