r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 150

no-image

r4f2456

Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
r4f24565NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
r4f24565NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
r4f24568NVFQV
Manufacturer:
REA
Quantity:
15
Part Number:
r4f24568NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
r4f24568NVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
r4f24568NVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
r4f24568NVZFQV
Manufacturer:
REA
Quantity:
5
Part Number:
r4f24568NVZFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
r4f24569DVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
r4f24569DVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
r4f24569VFQV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 5 Interrupt Controller
5.3.5
ISR is an IRQ15 to IRQ0 interrupt request flag register.
Notes: 1. Only 0 can be written, to clear the flag.
Rev. 1.00 Sep. 19, 2008 Page 120 of 1342
REJ09B0467-0100
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
IRQ15F*
IRQ14F*
IRQ13F*
IRQ12F*
IRQ11F*
IRQ10F*
IRQ9F*
IRQ8F*
IRQ7F
IRQ6F
IRQ5F
IRQ4F
IRQ3F
IRQ2F
IRQ1F
IRQ0F
2. These bits are reserved in the H8S/2454 Group.
IRQ Status Register (ISR)
2
2
2
2
2
2
2
2
Initial Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Description
[Setting condition]
When the interrupt source selected by ISCR
occurs
[Clearing conditions]
1, then writing 0 to IRQnF flag
executed when low-level detection is set and
IRQn input is high
executed when falling, rising, or both-edge
detection is set
interrupt, and the DISEL bit in MRB of the DTC
is cleared to 0
Cleared by reading IRQnF flag when IRQnF =
When interrupt exception handling is
When IRQn interrupt exception handling is
When the DTC is activated by an IRQn

Related parts for r4f2456