r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 257

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

6.7.9
There are two ways of inserting wait states in a DRAM access cycle: program wait insertion and
pin wait insertion using the WAIT pin.
Wait states are inserted to extend the CAS assertion period in a read access to DRAM space, and
to extend the write data setup time relative to the falling edge of CAS in a write access.
(1)
When the bit in ASTCR corresponding to an area designated as DRAM space is set to 1, from 0 to
7 wait states can be inserted automatically between the T
settings in WTCR.
(2)
When the WAITE bit in BCR is set to 1 and the ASTCR bit is set to 1, wait input by means of the
WAIT pin is enabled. When DRAM space is accessed in this state, a program wait (T
inserted. If the WAIT pin is low at the falling edge of φ in the last T
is inserted. If the WAIT pin is held low, T
Figures 6.38 and 6.39 show examples of wait cycle insertion timing in the case of 2-state and 3-
state column address output cycles.
Program Wait Insertion
Pin Wait Insertion
Wait Control
w
states are inserted until it goes high.
c1
state and T
Rev. 1.00 Sep. 19, 2008 Page 227 of 1342
c1
c2
or T
Section 6 Bus Controller (BSC)
state, according to the
w
state, another T
REJ09B0467-0100
w
) is first
w
state