r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 180

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r4f2456

Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 6 Bus Controller (BSC)
6.2
Table 6.1 shows the pin configuration of the bus controller.
Table 6.1
Rev. 1.00 Sep. 19, 2008 Page 150 of 1342
REJ09B0467-0100
Name
Address strobe
Address hold
Read
High write/write enable
Low write
Chip select 0
Chip select 1
Chip select 2/
row address strobe 2/
row address strobe *
Chip select 3/
row address strobe 3/
column address strobe *
Input/Output Pins
Pin Configuration
1
1
Symbol
AS
AH
RD
HWR/WE
LWR
CS0
CS1
CS2/
RAS2/
RAS *
CS3/
RAS3/
CAS *
1
1
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Output
Function
Strobe signal indicating that normal space
is accessed and address output on
address bus is enabled.
Signal indicating the timing for latching the
address when the address/data
multiplexed I/O space is set.
Strobe signal indicating that normal space
is being read.
Strobe signal indicating that normal space
is written to, and upper half (D15 to D8) of
data bus is enabled or DRAM space write
enable signal.
Strobe signal indicating that normal space
is written to, and lower half (D7 to D0) of
data bus is enabled.
Strobe signal indicating that area 0 is
selected.
Strobe signal indicating that area 1 is
selected
Strobe signal indicating that area 2 is
selected, DRAM row address strobe signal
when area 2 is DRAM space or areas 2 to
5 are set as continuous DRAM space, or
row address strobe signal of the
synchronous DRAM when the
synchronous DRAM interface is selected.
Strobe signal indicating that area 3 is
selected, DRAM row address strobe signal
when area 3 is DRAM space, or column
address strobe signal of the synchronous
DRAM when the synchronous DRAM
interface is selected.

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