r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 311

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

(3)
If an external read occurs after an external write while the ICIS2 bit is set to 1 in BCR, an idle
cycle is inserted at the start of the read cycle.
Figure 6.79 shows an example of the operation in this case. In this example, bus cycle A is a CPU
write cycle and bus cycle B is a read cycle from an external device. In (a), an idle cycle is not
inserted, and a collision occurs in bus cycle B between the CPU write data and read data from an
external device. In (b), an idle cycle is inserted, and a data collision is prevented.
Read after Write
Address bus
CS (area A)
CS (area B)
HWR, LWR
Data bus
RD
Figure 6.79 Example of Idle Cycle Operation (Read after Write)
φ
(a) No idle cycle insertion
T
(ICIS2 = 0)
1
Bus cycle A
Long output floating time
T
2
T
3
Bus cycle B
T
1
T
2
Data collision
Address bus
CS (area A)
CS (area B)
Data bus
HWR
RD
φ
Rev. 1.00 Sep. 19, 2008 Page 281 of 1342
T
(b) Idle cycle insertion
1
Bus cycle A
(ICIS2 = 1, initial value)
T
2
Section 6 Bus Controller (BSC)
T
3
Idle cycle
T
i
Bus cycle B
T
1
REJ09B0467-0100
T
2