PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 97

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PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
3.8.2.3
The result of any measurement can be read via the result registers LMRES1/2. This
gives a 16-bit value, with LMRES1 being the high and LMRES2 being the low byte. The
result is coded in 16-bit two´s complement:
Table 18
–Full Scale
0x8000
–32768
3.8.2.4
Both AC and DC level metering allows use of a programmable integrator. The integrator
may be configured for a single measurement or to run continuously. See
through
Single Measurement Sequence (AC & DC Level Metering)
Figure 41
Preliminary Data Sheet
Figure
IN T R E G 2: LM -O K
LM C R 1: LM -E N
Negative Value Range
Result Register Data Format
Using the Level Metering Integrator
Level Metering Result Value Range
Single Measurement Sequence (AC & DC Level Metering)
43.
LM C R 1: L M -O N C E = 1
0xFFFF
–1
In t. P e rio d
Read Result
LMRES1/2
97
0
0
Positive Value Range
S ta rt N ew
M easurem ent
Operational Description
duslic_0019_LM_single
In t. P e rio d
+Full Scale
0x7FFF
+32767
DS3, 2003-07-11
Figure 41
DuSLIC

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