PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 114

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

the voltage zero crossing. This can be achieved by programming the ring generator
delay appropriately (see DuSLICOS DC Control Parameter 2/4). The integration time for
the current measurement is determined by the ring frequency (refer to CRAM
coefficients, see
only if the bit LM-ONCE in register LMCR1 is set. Otherwise, the level meter would
continuously measure the current even if the ramp is finished and turned into its constant
voltage position. Because of the constant voltage, no current will flow.
Figure 47
Preliminary Data Sheet
(
V
HR
SLIC-E/-E2
SLIC-S/-S2
+
V
BATH
GND
V
BATH
V
)/2
HR
LMCR1: LM-EN
INTREG2: LM-OK
INTREG2: READY
Line Current i
Capacitance Measurement
Table
TIP
RING
21). After the integration time, measurement stops automatically
V
DC,Start
Settling of line current i:
Set ringer delay T
current measurement in the settled current range.
T
RING,DELAY
Programmable Voltage Slope
114
RING,DELAY
high enough to do the actual
Int. Period
Operational Description
V
DC,Stop
RING
TIP
V
V
GND
DS3, 2003-07-11
BATR
BATR
ezm14053
SLIC-P
/2
DuSLIC