PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 55

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

2.7.2
SLICOFI-2/-2S also supports metering by polarity reversal by changing the actual
polarity of the voltages on the TIP/RING lines. Polarity reversal is activated by switching
the REVPOL bit in register BCR1 to one or by switching to the “Active with Metering”
mode by the CIDD or CIOP command (see
Modes” on Page
2.7.2.1
Some applications require a smooth polarity reversal (soft reversal), as shown in
27. Soft reversal helps prevent negative effects such as non-required ringing. Soft
reversal is deactivated by the SOFT-DIS bit in register BCR2.
SOFT-DIS = 1
SOFT-DIS = 0
Figure 27
START: The soft ramp starts by setting the REVPOL bit in register BCR1 to 1. The DC
characteristic is switched off.
SR-END1: At the soft reversal end one point, the DC characteristic is switched on again.
Programmable by the DuSLICOS software, such as U/8.
SR-END2: At the soft reversal end two point, the soft ramp is switched off.
Programmable by the DuSLICOS software, such as 1/16
From START to SR-END2 the READY bit in register INTREG2 is set to 0 (see register
description in
Preliminary Data Sheet
Metering by Polarity Reversal
Soft Reversal
Chapter 5.3.1.2
Soft Reversal (Example for Open Loop)
Immediate reversal is performed (hard reversal)
Soft reversal is performed. Transition time (time from START to
SR-END1, see
default value is 80 ms.
74).
V
TIP/RING
-10
-15
-20
-25
25
20
15
10
-5
5
0
0
[V]
U
START
50
for further information).
Figure
U/8
100
27) is programmable by CRAM coefficients;
SR-END1
55
150
“Overview of all DuSLIC Operating
200
SR-END2
= 1/16*SR-END1
SR-END1.
250
Functional Description
t [ms]
DS3, 2003-07-11
ezm14038
DuSLIC
Figure