PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 85

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PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
Figure 36
Preliminary Data Sheet
Reset signal at pin RESET
DuSLIC Reset Sequence
t
rej
(1 to 4 µs)
Chip reset:
- all I/O pins deactivated
- all outputs inactive (e.g. DXA/DXB)
- internal PLL stopped
- internal clocks deactivated
SLICOFI-2x internal reset routine
min. 12*125 µs = 1.5 ms
85
duslic_0016_reset_sequence
Operational Description
First access to SLICOFI-2x
possible (RESET interrupt must
be cleared).
Chip in power down high
impedance (PDH)
DS3, 2003-07-11
t
DuSLIC

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