PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 3

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

Preliminary Data Sheet
Revision History:
Previous Version: DS2
Page
Title
all
all
all
all
all
all
all
all
all
all
Page 18
Page 23
Page 25
Page 32
Page 33
Page 38
Page 42
Page 50
Page 61
Page 61
Page 64
Subjects (major changes since last revision)
Product name corrected to Dual Channel Subscriber Line Interface
Concept
PEB 3265 version changed from 1.2 to 1.5
PEB 4264/-2 and PEB 4265/-2: version 1.2 added
PEB 4266 version changed from 1.1 to 1.2
PEB 3264 version changed from 1.2 to 1.4
Bit VRTLIM renamed to VTRLIM
Bit VRTLIM-M renamed to VTRLIM-M
New SLICs TSLIC-E and TSLIC-S added
New SLICOFI-2 (Version 1.5 only) package P-TQFP-64-1 added
New package P-VQFN-48-4 for SLIC-S/-S2, SLIC-E/-E2 and SLIC-P
added
Former chapter 2 "Pin Descriptions" removed. See updated device data
sheets.
“Overview” on Page
chips added.
“Features” on Page
“Logic Symbols” on Page
added.
“Block Diagram SLICOFI-2/-2S” on Page
devices removed.
Figure 10 "Signal Paths – DC Feeding" on Page
to
Table 4 "DC Characteristics" on Page
V.
Figure 19 "Signal Paths – AC Transmission" on Page
renamed to
“Internal Balanced Ringing via SLICs” on Page
V
renamed to
Figure 30 "Bellcore On-Hook Caller ID Physical Layer Transmission"
on Page
“Caller ID Buffer Handling of SLICOFI-2” on Page
listing item (9) changed
“Non Linear Processor (NLP) in DuSLIC-E/-E2/-P” on Page 64
DROP,RT
C
ITACA
renamed to
(
61: note added.
C
ITACB
C
V
2003-07-11
TR0,RMS
ITACA
).
(
C
V
ITACB
23: ITU-T Recommendation G.712 added
18: Chapter reworked, tables for codec and SLIC
DROP,TR
).
25: Logic symbol for SLIC-E/-E2 Version 1.2
,
V
RT,RMS
renamed to
38:
32: block diagrams of SLIC
V
LIM
changed from 50 V to 72
33:
V
50:
TR,RMS
61: description for
C
ITA
42:
,
(
C
V
ITB
RT0,RMS
C
ITA
) renamed
DS3
(
added.
C
ITB
)