PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 116

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

I
•
•
•
•
The actual current I
The capacitance C
Example:
LM
LM
I
C
Note: To increase the accuracy an offset calibration can be performed. The voltage
3.8.2.12 Line Capacitance Measurements Ring and Tip to GND
The voltage ramp can be applied to either line, whereas the other line is set to high
impedance by setting bits HIR and HIT in register BCR1 accordingly. In this way,
capacitance measurements from Ring and Tip to GND may be accomplished. Because
of one line being set to high impedance, the actual line current will be twice the calculated
one (multiplication by a factor of two necessary).
3.8.2.13 Foreign- and Ring Voltage Measurements
The DuSLIC supports two user-programmable input/output pins (IO3, IO4) that can be
used for measuring external voltages. If the pins IO3 and/or IO4 are led properly over a
voltage divider to the Ring- and Tip wire, foreign voltages from external voltage sources
supplied to the lines can be measured on either pin; even a differential measurement will
Preliminary Data Sheet
C
CMeasure
CMeasure
Measure
Measure
– Comment: The voltage ramp starts at RO1 and ramps up/down until RO2 is
Value
Result
Enable the ramp generator by setting bit RAMP-EN in register LMCR2 to 1.
Apply Ring Offset voltage RO2 to Ring and Tip line by setting bits RNG-OFFSET[1:0]
in register LMCR3 to 10.
Enable the level meter by setting bit LM-EN in register LMCR1 to 1.
Read the result registers LMRES1 and LMRES2
achieved. After the integration time, the result will be stored within LMRES1 and
LMRES2 registers.
ramp can be applied when the line is set to high impedance by setting bits HIR and
HIT in register BCR1. In this way, the offset currents can be measured and
substracted later. As an alternative a rising and a falling ramp can be used to
compensate current offsets.
= 0x3AF2 = 15090
= 0.4605
= 1,842 mA/200 V/s = 9.21 µF
= 2*2 mA*0.4605 = 1.842 mA
=
=
2
I
-------------------------
CMeasure
dU
------- -
I
dt
LM DC
Measure
CMeasure
calculates as:
amounts to:
LM
Result
116
Operational Description
DS3, 2003-07-11
DuSLIC