PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 67
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
PEB 4364 T V1.2
Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet
1.PEB_3264_F_V1.4.pdf
(374 pages)
Specifications of PEB 4364 T V1.2
Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
SP000007728
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- Download datasheet (6Mb)
Example:
•
•
•
Example for SLICOFI-2 Version 1.5 (with NLP):
•
•
2.9
Message Waiting Indication (MWI) is usually performed using a glow lamp at the
subscriber phone. Current does not flow through a glow lamp until the voltage reaches
a threshold value above approximately 80 V. At this threshold, the neon gas in the lamp
will start to glow. When the voltage is reduced, the current falls under a certain threshold
and the lamp glow is extinguished. DuSLIC has high-voltage SLIC technology (170 V)
that is able to activate the glow lamp without any external components.
The hardware circuitry is shown in
circuit with the hook switch in the on-hook mode, together with the impedances for the
on-hook (Z
Figure 33
Preliminary Data Sheet
All algorithms for all channels enabled and LEC Length = 8 ms (LEN = 64):
All algorithms for all channels enabled and LEC Length = 4 ms (LEN = 32):
4 x UTD, 2 x DTMF Receiver and 2 x LEC (8 ms) enabled:
All algorithms for all channels enabled and LEC Length = 4 ms (LEN = 32):
2 x DTMF Receiver, 2 x LEC (8 ms) and 2 x NLP enabled:
33.32 MIPS total computing load exceeding the 32 MIPS limit!
31.272 MIPS total computing load within the 32 MIPS limit.
29.85 MIPS total computing load within the 32 MIPS limit.
36.344 MIPS total computing load exceeding the 32 MIPS limit!
30.1 MIPS total computing load within the 32 MIPS limit.
R
Message Waiting Indication in DuSLIC-E/-E2/-P
) and off-hook (Z
MWI Circuitry with Glow Lamp
L
Z
) modes.
L
Z
R
Figure
R
MW
Lamp
MW
67
33. The figure shows a typical telephone
Z
Z
R
L
R
MW
AC Impedance
Ringer Impedance
Pre Resistor Message Waiting
Functional Description
DS3, 2003-07-11
ezm14066
DuSLIC
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