PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 292

no-image

PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
Bit
MU-LAW
LIN
PCMX-EN
CRAM-EN
Preliminary Data Sheet
17
H
BCR3
LAW
MU-
7
Selects the PCM Law
MU-LAW = 0
MU-LAW = 1
Voice transmission in a 16-bit linear representation for test purposes.
Note: Voice transmission on the other channel is inhibited if one channel
LIN = 0
LIN = 1
Enables writing of subscriber voice data to the PCM highway.
PCMX-EN = 0
PCMX-EN = 1
Coefficients from CRAM are used for programmable filters and DC loop
behavior.
CRAM-EN = 0
CRAM-EN = 1
is set to linear mode and the IOM-2 interface is used.
In PCM/microcontroller interface mode, both channels can be in
linear mode using two consecutive PCM timeslots on the highways.
A proper timeslot selection must be specified.
LIN
6
Basic Configuration Register 3
PCM mode enabled (8 bit, A-Law, or µ-Law).
Linear mode enabled (16 bit).
Writing of subscriber voice data to PCM highway is
disabled.
Writing of subscriber voice data to PCM highway is
enabled.
Coefficients from ROM are used.
Coefficients from CRAM are used.
A-Law enabled.
µ-Law enabled.
5
0
PCMX-
EN
292
4
3
0
2
0
00
H
1
0
DS3, 2003-07-11
DuSLIC
CRAM-
EN
0
Y

Related parts for PEB 4364 T V1.2