PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 205

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

Table 35
CRAM coefficients are enabled by setting bit CRAM-EN in register BCR3 to 1, except
coefficients marked
Coefficients marked
Coefficients marked
Preliminary Data Sheet
Byte 7
Res. in Resistive
16
Ring Offset RO3
Zone R
Band-pass for AC LM
15
Hook Message
LM DC Gain
K12
Waiting
Byte 6
IM K Factor
14
Extended
Feeding
Battery
Gain
IM 4 MHz Filter
CRAM Coefficients
Res. in Constant
13
Ring Offset RO2
Current Zone R
Byte 5
1)
2)
1)
Soft Reversal End
12
Hook Threshold
Ring Generator
AC Ring Trip
are enabled by setting bit PTG in register DSCR to 1.
are enabled by setting bit LPRX-CR in register BCR3 to 1.
and
FIR Filter for TTX
Amplitude
Conference
11
2)
LM Threshold
I
Gain
:
Transhybrid Coefficient Part 1
Byte 4
Voltage Level V
FIR Filter in Transmit Direction
10
Transhybrid Coefficient Part 2
FIR Filter in Receive Direction
TG1 Band-pass
TG2 Band-pass
Constant Current I
Transhybrid Coefficient Part 3
LM-
AC
Reserved
Hook Threshold
Constant Ramp
9
Ring Generator
Frequency
Byte 3
LPR
LPX
Ring
CR
2nd Gain Stage
2nd Gain Stage
8
TR
205
Transmit
Receive
IM FIR Filter
DC Low-pass Filter
K1
7
Byte 2
TP2
TTX Slope
Knee Voltage
Hook Threshold
Ring Generator
6
IM WDF Filter
Soft Ramp SS
TG1 Gain
TG2 Gain
Low-pass
Active
5
1st Gain Stage Transmit
1st Gain Stage Receive
Byte 1
V
4
K1
DC Low-pass Filter
Open Circuit Volt.
Ring Offset RO1
Hook Threshold
TG1 Frequency
TG2 Frequency
3
Ring Delay RD
Power Down
TP1
TTX Level
Byte 0
V
2
LIM
DS3, 2003-07-11
1
Offset
[7:0]
00
08
10
18
20
28
30
38
40
48
50
58
60
68
70
78
80
88
90
98
DuSLIC
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
TH1
TH2
TH3
FRR
FRX
AR
AX
PTG1
PTG2
LPR
LPX
TTX
IM1_F
IM2_F
RINGF
RAMPF
DCF
HF
TPF
2)
2)
1)
1)