PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 189

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PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
Bit
This register is not applicable and is not used in IOM-2 mode. It is only enabled in
PCM/microcontroller mode.
R1-HW
R1-TS[6:0]
Preliminary Data Sheet
21
H
PCMR1
HW
R1-
7
Selection of the PCM highway for receiving PCM data or the higher byte
of the first data sample if a linear 16-kHz PCM mode is selected.
R1-HW = 0
R1-HW = 1
Selection of the PCM timeslot used for data reception.
Note: The programmed PCM timeslot must correspond to the available
slots defined by the PCLK frequency. No reception will occur if a
slot outside the actual numbers of slots is programmed. In linear
mode (bit LIN = 1 in register BCR3), R1-TS defines the first of two
consecutive slots used for reception.
6
PCM Receive Register 1
5
PCM highway A is selected.
PCM highway B is selected.
4
189
R1-TS[6:0]
3
2
00
H
1
DS3, 2003-07-11
DuSLIC
0
Y

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