PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 342

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

Table 78
Parameter
Ring trip detection
time delay
Ring off time delay
1) can be reduced with current offset error compensation described in
6.3
For power up of SLICOFI-2/-2S and SLIC devices please refer to the instructions given
in the device data sheets.
6.4
T
6.4.1
Figure 83
During AC-Testing, the CMOS inputs are driven at a low level of 0.8 V and a high level
of 2.0 V. The CMOS outputs are measured at 0.5 V and
Preliminary Data Sheet
A
V
D D
= –40 °C to 85 °C, unless otherwise stated.
– 0 .5 V
0 .5 V
DuSLIC Power Up
DuSLIC Timing Characteristics
Input/Output Waveform for AC Tests
DC Characteristics (cont’d)
Waveform for AC Tests
0 .8 V
2 .0 V
Symbol Conditions
–
–
T e st P o in ts
–
–
2 .0 V
0 .8 V
342
In p u t P a d :
O u tp u t P a d :
V
under test
Chapter 3.8.2.8
IL
Device
, V
V
min.
–
–
DD
IH
Electrical Characteristics
– 0.5 V respectively.
Limit Values
I
under test
O L
Device
typ.
–
–
, I
O H
DS3, 2003-07-11
C
Load
ezm37010
max.
2
2
= 5 0 p F m a x
DuSLIC
Unit
cycle
cycle