PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 65

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PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
NLP bypasses local DTMF signals, but it would be a good strategy to only enable the
NLP after the call has been completely established (far end talker connected).
2.8.5
Each channel of the DuSLIC-E/-E2/-P has two Universal Tone Detection (UTD) units that
can be used to detect special tones in the receive and transmit paths, especially fax or
modem tones (for example, see the modem startup sequence described in the ITU-T V.8
recommendation). This allows the use of modem-optimized filter for V.34 and V.90
connections. If the DuSLIC-E/-E2/-P UTD detects that a modem connection is about to
be established, the optimized filter coefficients for the modem connection can be
downloaded before the modem connection is set up. With this mechanism implemented
in the DuSLIC-E/-E2/-P chip set, the optimum modem transmission rate can always be
achieved.
Figure 32
Figure 32
Initially, the input signal is filtered by a programmable band-pass filter (center frequency
f
(lower path) are determined, and the absolute value is calculated. Both signals are
furthermore filtered by a limiter and a low-pass filter. All signal samples (absolute values)
below a programmable limit Lev
samples are diminished by Lev
robustness. After the limiter stages, both signals are filtered by a fixed low-pass filter.
The evaluation logic block determines whether a tone interval or silence interval is
detected and whether an interrupt is generated for the receive or transmit path.
Preliminary Data Sheet
C
and bandwidth
S
U T D
shows the functional block diagram of the UTD unit:
Universal Tone Detection in DuSLIC-E/-E2/-P
UTD Functional Block Diagram
P rogram m able
f
BW
B and-pass
). Both the in-band signal (upper path) and the out-of-band signal
N
N
. The purpose of this limiter is to increase noise
(noise level) are set to zero and all other signal
|x|
|x|
65
Lim it
Lim it
+
+
L P
L P
E valuation
Functional Description
Logic
E Z M 14061
DS3, 2003-07-11
DuSLIC

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