PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 91

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PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
3.7.1
For optimized power consumption, unused EDSP functions must be switched off. Typical
power dissipation values for different operating modes of the SLICOFI-2x can be found
in the device data sheets.
3.7.2
The SLIC’s power dissipation can be divided into two parts, the first arising from internal
bias currents, the second being caused by any current fed to the line:
P
with
P
P
Note:
For any operating mode, the quiescent power dissipation
thus is determined by the internal supply currents as specified in the respective SLIC
data sheets (
been spent to keep them low.
Nevertheless, in typical active operations, the power component
current dominates. This power is dissipated in the output stages (to some small extent
also in the current sensor) and is approximately proportional to the difference of
respective supply voltage
reduction is to keep the supply voltage as low as possible.
3.7.2.1
In all Power Down modes, the internal bias currents are extremely small and no current
is fed to the line. Even with active off-hook detection, the resulting power dissipation of
5 mW is negligible. It is worth pointing out, that in large systems, due to the high
percentage of inactive lines, this is the dominant factor for achieving a very low mean
power value.
Preliminary Data Sheet
Q
O
=
=
= (1.05 *
P
V
Q
V
denote line voltage, current and total line resistance, resp..
DD
+
BATx
P
*
O
I
SLICOFI-2x Power Dissipation
SLIC Power Dissipation
Power Down Modes
DD
V
is the relevant output stage supply voltage, whereas
I
BATx
BATR
+ |
V
-
BATL
= 0 for SLIC-E/S,
V
TR
| *
) *
I
V
BATL
I
TR
BATx
= 1.05 *
+ |
and line voltage
V
BATH
I
V
HR
| *
BATx
= 0 for SLIC-P). Significant design effort has
I
91
BATH
*
I
TR
+ |
V
-
V
TR
R
BATR
. Obviously, the best way for power
Loop
| *
*
P
I
I
Q
TR
BATR
(power at zero line current)
2
Operational Description
+
P
V
O
HR
V
caused by the line
TR
*
I
DS3, 2003-07-11
,
HR
I
TR
and
DuSLIC
R
Loop
[1]
[2]

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