PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 48

• Manufacturer Part Number: PEB 4364 T V1.2
• Description: IC SLIC VOICE ACCESS PDSO-36
• Manufacturer: Infineon Technologies
• Series: DuSLICr

Specifications of PEB 4364 T V1.2

• Function: Dual Channel Subscriber Line Interface Circuit (DuSLIC)
• Interface: IOM-2, PCM
• Number Of Circuits: 2
• Voltage - Supply: 3.3 V ~ 5 V
• Current - Supply: 105mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-PDSO
• Includes: DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB4364TV1.2XT; SP000007728

For SLIC-S2, only external ringing is provided.
SLIC-E/-E2 allows balanced ringing up to 85 Vrms and can, therefore, be used in
systems with higher loop impedance.
The low-power SLIC-P is optimized for power-critical applications (such as intelligent
ISDN network termination). Internal ringing can be used up to 85 Vrms balanced or 50
Vrms unbalanced. For lowest power applications where external ringing is preferred,
three different battery voltages (
consumption of the application.
SLIC-E/-E2 and SLIC-P differ in supply voltage configuration and the ring voltages at Tip
and Ring
Both internal and external ringing are activated by switching the DuSLIC to ringing mode
by setting the CIDD/CIOP
Operating Modes” on Page
External Ringing Support by DuSLIC
The following settings must be made:
•
•
•
•
The ring relay is controlled by the IO1 pin (see
capability of the IO1 output, no additional relay driver is necessary.
The relay is switched either synchronously or asynchronously as follows:
•
A ring generator delay T
programmed to consider the ring relay delay T
•
The ring relay is switched immediately with the ring command.
1) In this case, V
2) CIDD = Data Downstream Command/Indication Channel Byte (IOM-2 interface)
Preliminary Data Sheet
of different loop lengths in the off-hook state.
CIOP = Command/Indication Operation
Enable the use of an external ring signal generator by setting bit REXT-EN in register
BCR2 to 1.
A TTL compatible zero crossing signal must be applied to the RSYNC pin of the
SLICOFI-2x (see
Activate the ringing mode by setting the CIDD/CIOP bits M2, M1, M0 to 101.
Set the DuSLIC internal ring frequency to a value according a factor of approximately
0.75 of the external ring frequency.
Synchronous to the zero crossing of the external ringing frequency
(bit ASYNCH-R in register XCR set to 0)
Asynchronous
(bit ASYNCH-R in register XCR set to 1)
V
T
and
BATR
is typically used for the on-hook state, while V
V
R
. External ringing is supported by both SLICs.
Figure
RING,DELAY
2)
23).
bits M2, M1, M0 to 101 (see
74).
1)
V
BATR
(see DuSLICOS control parameters 2/4) can be
,
V
BATH
48
,
V
BATL
RING-RELAY,DELAY
Figure
) can be used to optimize the power
BATH
92). Due to the high current drive
and V
“Overview of all DuSLIC
BATL
as shown in
Functional Description
are used for optimized feeding
DS3, 2003-07-11
Figure
DuSLIC
23.