PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 108
PEB 4364 T V1.2
Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet
1.PEB_3264_F_V1.4.pdf
(374 pages)
Specifications of PEB 4364 T V1.2
Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
SP000007728
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K
K
V
Trapez
Output voltage between Tip and Ring:
V
The bytes below are valid for tone generator TG1 an a frequency of 1000 Hz.
CRAM:
Address
Address
Address
Address
Address
Address
T11G, T12G and T13G are 4-bit nibbles which control the amplitude of the tone
generator TG1.
Table 25
T11G
8
8
8
8
8
8
8
3.8.2.7
A threshold can be set for the level meter result. When the result exceeds the threshold,
then bit LM-THRES in register INTREG 2 is set to 1. It is also possible to activate an
interrupt when the LM-THRES bit changes by setting the bit LM-THM (level meter
threshold mask bit) in register LMCR2 to 0.
Preliminary Data Sheet
DA
AC,SLIC
DAC
OUT
= K
DA
* K
Level Meter Threshold
Constant factor from Digital to Analog
Amplification factor of the SLIC
Voltage at D/A converter referred to digital full scale
Crest factor of the trapezoidal signal
0x39: T11G/0
0x40: T13G/T12G
0x42: 0xB3
0x38: 0x08
0x41: 0x05
0x43: 0x01
K
TG
TG
Setting Table
T12G
9
0
1
:
5
6
7
108
T13G
1
8
8
8
8
8
8
Operational Description
K
7/8
½
¼
:
1/64
1/128
1/256
TG
DS3, 2003-07-11
3.84 Vrms
6
1.2 V
1.05
DuSLIC
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