MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 49

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Freescale Semiconductor
Addr.
$009C
$009D
$009A
$009B
$009E
$009F
$00A0
$00A1
$00A2
$00A3
$00A4
$00A5
Notes:
1. Available only on MC68HC912B32 and MC68HC912BC32 devices.
2. Available only on MC68HC912B32 and MC68HC12BE32 devices.
3. Available only on MC68HC(9)12BC32 devices.
Compare 5 Register High (TC5H)
Compare 6 Register High (TC6H)
Compare 7 Register High (TC7H)
Pulse Accumulator Flag Register
Compare 5 Register Low (TC5L)
Compare 6 Register Low (TC6L)
Compare 7 Register Low (TC7L)
Timer Input Capture/Output
Timer Input Capture/Output
Timer Input Capture/Output
Timer Input Capture/Output
Timer Input Capture/Output
Timer Input Capture/Output
Register Name
Pulse Accumulator Control
Pulse Accumulator Count
Pulse Accumulator Count
Pulse Accumulator Count
Pulse Accumulator Count
Register 3 (PACN3)
Register 2 (PACN2)
Register 1 (PACN1)
Register 0 (PACN0)
Register (PACTL)
See page 150.
See page 150.
See page 151.
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See page 178.
See page 178.
See page 178.
See page 178.
(PAFLG)
Figure 2-1. Register Map (Sheet 10 of 19)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
M68HC12B Family Data Sheet, Rev. 9.1
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented
PAEN
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
6
0
0
0
0
0
0
0
0
0
0
0
0
0
PAMOD
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
5
0
0
0
0
0
0
0
0
0
0
0
0
0
PEDGE
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
R
4
0
0
0
0
0
0
0
0
0
0
0
0
0
= Reserved
Bit 11
Bit 11
Bit 11
CLK1
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 10
Bit 10
Bit 10
CLK0
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
U = Unaffected
PAOVF
PAOVI
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
1
0
0
0
0
0
0
0
0
0
0
0
0
Registers
Bit 0
PAIF
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
PAI
0
0
0
0
0
0
0
0
0
0
0
0
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