MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 45

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Freescale Semiconductor
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Notes:
↓
1. Available only on MC68HC912B32 and MC68HC912BC32 devices.
2. Available only on MC68HC912B32 and MC68HC12BE32 devices.
3. Available only on MC68HC(9)12BC32 devices.
Port AD Data Input Register
Register Name
ATD Test Register High
ATD Control Register 5
ATD Test Register Low
ATD Result Register 0
ATD Result Register 0
ATD Result Register 1
ATD Result Register 1
ATD Result Register 2
ATD Status Register
ATD Status Register
See page 282.
See page 284.
See page 284.
See page 285.
See page 285.
See page 286.
See page 286.
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See page 286.
(ATDTSTH)
(ATDSTAT)
(ATDSTAT)
(ATDCTL5)
(ATDTSTL)
(PORTAD)
(ADRx0H)
(ADRx1H)
(ADRx2H)
(ADRx0L)
(ADRx1L)
Reserved
Reserved
Figure 2-1. Register Map (Sheet 6 of 19)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
M68HC12B Family Data Sheet, Rev. 9.1
CCF7
SAR9
SAR1
PAD7
Bit 15
Bit 15
Bit 15
Bit 7
SCF
Bit 7
Bit 7
R
R
0
0
0
0
0
= Unimplemented
S8CM
CCF6
SAR8
SAR0
PAD6
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
R
R
6
0
0
0
0
0
0
SCAN
After reset, reflect the state of the input pins
CCF5
SAR7
PAD5
Bit 13
Bit 13
Bit 13
RST
Bit 5
Bit 5
R
R
5
0
0
0
0
0
0
TSTOUT
MULT
CCF4
SAR6
PAD4
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
R
R
R
4
0
0
0
0
0
0
Undefined
Undefined
Undefined
Undefined
Undefined
= Reserved
CCF3
SAR5
PAD3
Bit 11
Bit 11
Bit 11
TST3
Bit 3
Bit 3
CD
R
R
3
0
0
0
0
0
0
SAR4
PAD2
CCF2
TST2
Bit 10
Bit 10
Bit 10
CC2
Bit 2
Bit 2
CC
R
R
2
0
0
0
0
0
U = Unaffected
CCF1
SAR3
PAD1
TST1
CC1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
CB
R
R
1
0
0
0
0
0
Registers
CCF0
SAR2
PAD0
TST0
Bit 0
CC0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
CA
R
R
0
0
0
0
0
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