MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 19

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Chapter 1
General Description
1.1 Introduction
The MC68HC912B32, MC68HC12BE32 and MC68HC(9)12BC32, are 16-bit microcontroller units
(MCUs) composed of standard on-chip peripherals. The multiplexed external bus can also operate in an
8-bit narrow mode for interfacing with single 8-bit wide memory in lower-cost systems. There is a slight
feature set difference between the four pin-for-pin compatible devices as shown in
Freescale Semiconductor
CPU12
Multiplexed bus
32-Kbyte FLASH electrically erasable,
programmable read-only memory (EEPROM)
32-Kbyte read-only memory (ROM)
768-byte EEPROM
1-Kbyte random-access memory (RAM)
Analog-to-digital (A/D) converter
Standard timer module (TIM)
Enhanced capture timer (ECT)
Pulse-width modulator (PWM)
Asynchronous serial communications
interface (SCII)
Synchronous serial peripheral interface (SPI)
J1850 byte data link communication (BDLC)
Controller area network module (CAN)
Computer operating properly (COP)
watchdog timer
Slow mode clock divider
80-pin quad flat pack (QFP)
Single-wire background debug mode (BDM)
Features
Table 1-1. M68HC12B Series Feature Set Comparisons
M68HC12B Family Data Sheet, Rev. 9.1
MC68HC912B32 MC68HC12BE32 MC68HC912BC32 MC68HC12BC32
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Table
1-1.
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
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