MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 144

MC68HC912B32VFU8

Manufacturer Part Number
MC68HC912B32VFU8
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC912B32VFU8

Cpu Family
HC12
Device Core Size
16b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
63
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC912B32VFU8
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Standard Timer (TIM)
12.3.4 Timer Count Register
Read: Anytime
Write: Has no meaning or effect in normal mode; only writable in special modes
A full access for the counter register should take place in one clock cycle. A separate read/write for high
byte and low byte will give a different result than accessing them as a word.
The period of the first count after a write to the TCNT registers may be a different size because the write
is not synchronized with the prescaler clock.
12.3.5 Timer System Control Register
Read: Anytime
Write: Anytime
TEN — Timer Enable Bit
TSWAI — Timer Stops While in Wait Bit
144
If for any reason the timer is not active, there is no ÷64 clock for the pulse accumulator since the E ÷
64 is generated by the timer prescaler.
Timer interrupts cannot be used to get the MCU out of wait.
0 = Disables timer, including the counter; can be used for reducing power consumption
1 = Allows timer to function normally
0 = Allows timer to continue running during wait
1 = Disables timer when MCU is in wait mode
Address: $0084
Address: $0085
Address: $0086
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
TEN
Figure 12-7. Timer System Control Register (TSCR)
0
0
0
Figure 12-6. Timer Count Register (TCNT)
= Unimplemented
= Unimplemented
TSWAI
Bit 14
Bit 6
6
0
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
TSBCK
Bit 13
Bit 5
5
0
5
0
5
0
TFFCA
Bit 12
Bit 4
4
0
4
0
4
0
Bit 11
Bit 3
3
0
3
0
3
0
0
Bit 10
Bit 2
2
0
2
0
2
0
0
Bit 9
Bit 1
1
0
1
0
1
0
0
Freescale Semiconductor
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
0
0
0
0

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