MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 224

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Byte Data Link Communications (BDLC)
15.7.4.1 Invalid Passive Bit
See
occurs between the active-to-passive transition beginning the current data bit (or symbol) and A, the
current bit would be invalid.
15.7.4.2 Valid Passive Logic 0
See
occurs between A and B, the current bit would be considered a logic 0.
15.7.4.3 Valid Passive Logic 1
See
occurs between B and C, the current bit would be considered a logic 1.
15.7.4.4 Valid EOD Symbol
See
occurs between C and D, the current symbol would be considered a valid end-of-data symbol (EOD).
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Figure
Figure
Figure
Figure
15-6(1). If the passive-to-active received transition beginning the next data bit or symbol
15-6(2). If the passive-to-active received transition beginning the next data bit (or symbol)
15-6(3). If the passive-to-active received transition beginning the next data bit (or symbol)
15-6(4). If the passive-to-active received transition beginning the next data bit (or symbol)
ACTIVE
PASSIVE
ACTIVE
PASSIVE
ACTIVE
PASSIVE
ACTIVE
PASSIVE
Figure 15-6. J1850 VPW Received Passive Symbol Times
64 µs
A
A
M68HC12B Family Data Sheet, Rev. 9.1
128 µs
200 µs
B
B
C
C
D
(1) INVALID PASSIVE BIT
(2) VALID PASSIVE LOGIC 0
(3) VALID PASSIVE LOGIC 1
(4) VALID EOD SYMBOL
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