MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 148

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Standard Timer (TIM)
12.3.8 Timer Interrupt Flag Registers
Read: Anytime
Write: Used in the clearing mechanism; set bits cause corresponding bits to
TFLG1 indicates when interrupt conditions have occurred. To clear a bit in the flag register, write a 1 to
the bit. Writing a logic 0 does not affect current status of the bit.
When TFFCA bit in TSCR register is set, a read from an input capture or a write into an output compare
channel ($90–$9F) causes the corresponding channel flag CnF to be cleared.
C7F–C0F — Input Capture/Output Compare Channel n Flag
Read: Anytime
Write: Used in the clearing mechanism; set bits cause corresponding bits to
TFLG2 indicates when interrupt conditions have occurred. To clear a bit in the flag register, set the bit to 1.
Any access to TCNT clears TFLG2 register, if the TFFCA bit in TSCR register is set.
TOF — Timer Overflow Flag
148
Set when 16-bit free-running timer overflows from $FFFF to $0000. This bit is cleared automatically by
a write to the TFLG2 register with bit 7 set. For additional information, see the TCRE control bit
explanation found in
be cleared
be cleared
Address: $008E
Address: $008F
Reset:
Reset:
Read:
Read:
Write:
Write:
Bit 7
C7F
Bit 7
TOF
12.3.7 Timer Interrupt Mask
0
0
Figure 12-14. Timer Interrupt Flag 1 (TFLG1)
Figure 12-15. Timer Interrupt Flag 2 (TFLG2)
C6F
6
0
6
0
0
M68HC12B Family Data Sheet, Rev. 9.1
C5F
5
0
5
0
0
C4F
4
0
4
0
0
Registers.
C3F
3
0
3
0
0
C2F
2
0
2
0
0
C1F
1
0
1
0
0
Freescale Semiconductor
Bit 0
Bit 0
C0F
0
0
0